 | | | Itanium 2 processor | Itanium 2 processor 2007-11-02 - By Ivan Marinkovic
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Yes....with x86 architecture there's no problem showing the cache
size, but IA64 is different :(
Thanks a lot
Ivan Marinkovic
El 02-11-2007, a las 12:20, Andrew Bacchi escribi?:
> Hmm, mine does.
>
> processor : 0
> vendor_id : GenuineIntel
> cpu family : 15
> model : 4
> model name : Intel(R) Xeon(TM) CPU 3.00GHz
> stepping : 1
> cpu MHz : 3000.288
> cache size : 1024 KB
> physical id : 0
> siblings : 2
> runqueue : 0
> fdiv_bug : no
> hlt_bug : no
> f00f_bug : no
> coma_bug : no
> fpu : yes
> fpu_exception : yes
> cpuid level : 5
> wp : yes
>
> Ivan Marinkovic wrote:
>> Ok, but don't says nothing about cache size:
>> processor : 0
>> vendor : GenuineIntel
>> arch : IA-64
>> family : Itanium 2
>> model : 2
>> revision : 1
>> archrev : 0
>> features : branchlong
>> cpu number : 0
>> cpu regs : 4
>> cpu MHz : 1600.010360
>> itc MHz : 1600.010360
>> BogoMIPS : 2390.75
>> Thanks in advance,
>> Ivan Marinkovic
>> El 02-11-2007, a las 11:37, Andrew Bacchi escribi?:
>>> cat /proc/cpuinfo
>>>
>>>
>>> Ivan Marinkovic wrote:
>>>> Hi all
>>>> How can I check the cache size of Itanium2 processor?
>>>> Thanks in advance.
>>>> Ivan Marinkovic
>>>> Chile.
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>>>
>>> --
>>> veritatis simplex oratio est
>>> -Seneca
>>>
>>> Andrew Bacchi
>>> Systems Programmer
>>> Rensselaer Polytechnic Institute
>>> phone: 518.276.6415 fax: 518.276.2809
>>>
>>> http://www.rpi.edu/~bacchi/
>>>
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>> --
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>> Taroon-list@(protected)
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>
> --
> veritatis simplex oratio est
> -Seneca
>
> Andrew Bacchi
> Systems Programmer
> Rensselaer Polytechnic Institute
> phone: 518.276.6415 fax: 518.276.2809
>
> http://www.rpi.edu/~bacchi/
>
> --
> Taroon-list mailing list
> Taroon-list@(protected)
> https://www.redhat.com/mailman/listinfo/taroon-list
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