Path kernel 2.4.20-24.7 2003-12-04 - By Jury V. Sidorenko
Back Help Me! Please.
Help if it probably to understand with one problem.
After performance of updating of a package kernel (RedHat 7.3), there was a following problem. On a server two processors which are represented as four are established.
After updating and performance restart a server, one processor is represented as two and another is represented as one. Accordingly the server works as with three processors. A question. It occurs because of astable work of one processor (Harware error?) or this possible condition of work of a package kernel (My Software error). Result of work of a server in a file dmesg.
It is in advance grateful for the possible help in this question. Excuse for my bad English language, it is result of the electronic translator.
File: dmesg
Linux version 2.4.20-24.7smp (bhcompile@(protected)) (gcc version 2.96 20000731 (Red Hat Linux 7.3 2.96-113)) #1 SMP Mon Dec 1 13:18:03 EST 2003 BIOS-provided physical RAM map: BIOS-e820: 0000000000000000 - 000000000009b400 (usable) BIOS-e820: 000000000009b400 - 00000000000a0000 (reserved) BIOS-e820: 00000000000ce000 - 00000000000d0000 (reserved) BIOS-e820: 00000000000e0000 - 0000000000100000 (reserved) BIOS-e820: 0000000000100000 - 000000007fef0000 (usable) BIOS-e820: 000000007fef0000 - 000000007fefc000 (ACPI data) BIOS-e820: 000000007fefc000 - 000000007ff00000 (ACPI NVS) BIOS-e820: 000000007ff00000 - 000000007ff80000 (usable) BIOS-e820: 000000007ff80000 - 0000000080000000 (reserved) BIOS-e820: 00000000fec00000 - 00000000fec10000 (reserved) BIOS-e820: 00000000fee00000 - 00000000fee01000 (reserved) BIOS-e820: 00000000ff800000 - 00000000ffc00000 (reserved) BIOS-e820: 00000000fff00000 - 0000000100000000 (reserved) 1151MB HIGHMEM available. 896MB LOWMEM available. found SMP MP-table at 000f64d0 hm, page 000f6000 reserved twice. hm, page 000f7000 reserved twice. hm, page 0009b000 reserved twice. hm, page 0009c000 reserved twice. On node 0 totalpages: 524160 zone(0): 4096 pages. zone(1): 225280 pages. zone(2): 294784 pages. ACPI: Searched entire block, no RSDP was found. ACPI: RSDP located at physical address c00f6500 RSD PTR v0 [PTLTD ] __va_range(0x7fef8658, 0x68): idx=8 mapped at ffff6000 ACPI table found: RSDT v1 [PTLTD RSDT 1540.0] __va_range(0x7fefbe78, 0x24): idx=8 mapped at ffff6000 __va_range(0x7fefbe78, 0x74): idx=8 mapped at ffff6000 ACPI table found: FACP v1 [Intel SE7501CW 1540.0] __va_range(0x7fefbeec, 0x24): idx=8 mapped at ffff6000 __va_range(0x7fefbeec, 0x9c): idx=8 mapped at ffff6000 ACPI table found: APIC v1 [PTLTD APIC 1540.0] __va_range(0x7fefbeec, 0x9c): idx=8 mapped at ffff6000 LAPIC (acpi_id[0x0000] id[0x0] enabled[1]) CPU 0 (0x0000) enabledProcessor #0 Pentium 4(tm) XEON(tm) APIC version 16
LAPIC (acpi_id[0x0001] id[0x6] enabled[1]) CPU 1 (0x0600) enabledProcessor #6 Pentium 4(tm) XEON(tm) APIC version 16
LAPIC (acpi_id[0x0002] id[0x1] enabled[1]) CPU 2 (0x0100) enabledProcessor #1 Pentium 4(tm) XEON(tm) APIC version 16
LAPIC (acpi_id[0x0003] id[0x7] enabled[1]) CPU 3 (0x0700) enabledProcessor #7 Pentium 4(tm) XEON(tm) APIC version 16
IOAPIC (id[0x2] address[0xfec00000] global_irq_base[0x0]) IOAPIC (id[0x3] address[0xfec80000] global_irq_base[0x18]) IOAPIC (id[0x4] address[0xfec80400] global_irq_base[0x30]) INT_SRC_OVR (bus[0] irq[0x0] global_irq[0x2] polarity[0x1] trigger[0x1]) INT_SRC_OVR (bus[0] irq[0x9] global_irq[0x9] polarity[0x1] trigger[0x3]) LAPIC_NMI (acpi_id[0x0000] polarity[0x1] trigger[0x1] lint[0x1]) LAPIC_NMI (acpi_id[0x0001] polarity[0x1] trigger[0x1] lint[0x1]) LAPIC_NMI (acpi_id[0x0002] polarity[0x1] trigger[0x1] lint[0x1]) LAPIC_NMI (acpi_id[0x0003] polarity[0x1] trigger[0x1] lint[0x1]) 4 CPUs total Local APIC address fee00000 __va_range(0x7fefbf88, 0x24): idx=8 mapped at ffff6000 __va_range(0x7fefbf88, 0x28): idx=8 mapped at ffff6000 ACPI table found: BOOT v1 [PTLTD $SBFTBL$ 1540.0] __va_range(0x7fefbfb0, 0x24): idx=8 mapped at ffff6000 __va_range(0x7fefbfb0, 0x50): idx=8 mapped at ffff6000 ACPI table found: SPCR v1 [PTLTD $UCRTBL$ 1540.0] Enabling the CPU's according to the ACPI table Intel MultiProcessor Specification v1.4 Virtual Wire compatibility mode. OEM ID: Product ID: SE7501CW2 APIC at: 0xFEE00000 I/O APIC #2 Version 32 at 0xFEC00000. I/O APIC #3 Version 32 at 0xFEC80000. I/O APIC #4 Version 32 at 0xFEC80400. Enabling APIC mode: Flat. Using 3 I/O APICs Processors: 4 Kernel command line: ro root=/dev/md1 Initializing CPU#0 Detected 2790.770 MHz processor. Console: colour VGA+ 80x25 Calibrating delay loop... 5570.56 BogoMIPS Memory: 2059680k/2096640k available (1294k kernel code, 32268k reserved, 1079k data, 144k init, 1179072k highmem) Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes) Inode cache hash table entries: 131072 (order: 8, 1048576 bytes) Mount cache hash table entries: 512 (order: 0, 4096 bytes) Buffer-cache hash table entries: 131072 (order: 7, 524288 bytes) Page-cache hash table entries: 524288 (order: 9, 2097152 bytes) CPU: Trace cache: 12K uops, L1 D cache: 8K CPU: L2 cache: 512K CPU: Physical Processor ID: 0 Intel machine check architecture supported. Intel machine check reporting enabled on CPU#0. CPU: After generic, caps: bfebfbff 00000000 00000000 00000000 CPU: Common caps: bfebfbff 00000000 00000000 00000000 Enabling fast FPU save and restore... done. Enabling unmasked SIMD FPU exception support... done. Checking 'hlt' instruction... OK. POSIX conformance testing by UNIFIX mtrr: v1.40 (20010327) Richard Gooch (rgooch@(protected)) mtrr: detected mtrr type: Intel CPU: Trace cache: 12K uops, L1 D cache: 8K CPU: L2 cache: 512K CPU: Physical Processor ID: 0 Intel machine check reporting enabled on CPU#0. CPU: After generic, caps: bfebfbff 00000000 00000000 00000000 CPU: Common caps: bfebfbff 00000000 00000000 00000000 CPU0: Intel(R) Xeon(TM) CPU 2.80GHz stepping 07 per-CPU timeslice cutoff: 1463.06 usecs. enabled ExtINT on CPU#0 ESR value before enabling vector: 00000000 ESR value after enabling vector: 00000000 Booting processor 1/1 eip 2000 Initializing CPU#1 masked ExtINT on CPU#1 ESR value before enabling vector: 00000000 ESR value after enabling vector: 00000000 Calibrating delay loop... 5570.56 BogoMIPS CPU: Trace cache: 12K uops, L1 D cache: 8K CPU: L2 cache: 512K CPU: Physical Processor ID: 0 Intel machine check reporting enabled on CPU#1. CPU: After generic, caps: bfebfbff 00000000 00000000 00000000 CPU: Common caps: bfebfbff 00000000 00000000 00000000 CPU1: Intel(R) Xeon(TM) CPU 2.80GHz stepping 07 Booting processor 2/6 eip 2000 Not responding. Booting processor 2/7 eip 2000 Initializing CPU#2 masked ExtINT on CPU#2 ESR value before enabling vector: 00000000 ESR value after enabling vector: 00000000 Calibrating delay loop... 5570.56 BogoMIPS CPU: Trace cache: 12K uops, L1 D cache: 8K CPU: L2 cache: 512K CPU: Physical Processor ID: 3 Intel machine check reporting enabled on CPU#2. CPU: After generic, caps: bfebfbff 00000000 00000000 00000000 CPU: Common caps: bfebfbff 00000000 00000000 00000000 CPU2: Intel(R) Xeon(TM) CPU 2.80GHz stepping 07 Total of 3 processors activated (16711.68 BogoMIPS). cpu_sibling_map[0] = 1 cpu_sibling_map[1] = 0 WARNING: No sibling found for CPU 2. ENABLING IO-APIC IRQs Setting 2 in the phys_id_present_map ...changing IO-APIC physical APIC ID to 2 ... ok. Setting 3 in the phys_id_present_map ...changing IO-APIC physical APIC ID to 3 ... ok. Setting 4 in the phys_id_present_map ...changing IO-APIC physical APIC ID to 4 ... ok. init IO_APIC IRQs IO-APIC (apicid-pin) 2-0, 2-5, 2-10, 2-11, 2-17, 2-22, 3-0, 3-1, 3-2, 3-3, 3-4, 3-5, 3-6, 3-7, 3-8, 3-9, 3-10, 3-11, 3-12, 3-13, 3-14, 3-15, 3-16, 3-17, 3-18, 3-19, 3-20, 3-21, 3-22, 3-23, 4-1, 4-2, 4-3, 4-4, 4-5, 4-6, 4-7, 4-8, 4-9, 4-10, 4-11, 4-12, 4-13, 4-14, 4-15, 4-16, 4-17, 4-18, 4-19, 4-20, 4-21, 4-22, 4-23 not connected. ..TIMER: vector=0x31 pin1=2 pin2=0 number of MP IRQ sources: 20. number of IO-APIC #2 registers: 24. number of IO-APIC #3 registers: 24. number of IO-APIC #4 registers: 24. testing the IO APIC.......................
IO APIC #2...... .... register #00: 02000000 ....... : physical APIC id: 02 .... register #01: 00178020 ....... : max redirection entries: 0017 ....... : PRQ implemented: 1 ....... : IO APIC version: 0020 .... register #02: 00000000 ....... : arbitration: 00 .... IRQ redirection table: NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect: 00 000 00 1 0 0 0 0 0 0 00 01 0FF 0F 0 0 0 0 0 1 1 39 02 0FF 0F 0 0 0 0 0 1 1 31 03 0FF 0F 0 0 0 0 0 1 1 41 04 0FF 0F 0 0 0 0 0 1 1 49 05 000 00 1 0 0 0 0 0 0 00 06 0FF 0F 0 0 0 0 0 1 1 51 07 0FF 0F 0 0 0 0 0 1 1 59 08 0FF 0F 0 0 0 0 0 1 1 61 09 0FF 0F 0 0 0 0 0 1 1 69 0a 000 00 1 0 0 0 0 0 0 00 0b 000 00 1 0 0 0 0 0 0 00 0c 0FF 0F 0 0 0 0 0 1 1 71 0d 0FF 0F 0 0 0 0 0 1 1 79 0e 0FF 0F 0 0 0 0 0 1 1 81 0f 0FF 0F 0 0 0 0 0 1 1 89 10 0FF 0F 1 1 0 1 0 1 1 91 11 000 00 1 0 0 0 0 0 0 00 12 0FF 0F 1 1 0 1 0 1 1 99 13 0FF 0F 1 1 0 1 0 1 1 A1 14 0FF 0F 1 1 0 1 0 1 1 A9 15 0FF 0F 1 1 0 1 0 1 1 B1 16 000 00 1 0 0 0 0 0 0 00 17 0FF 0F 1 1 0 1 0 1 1 B9
IO APIC #3...... .... register #00: 03000000 ....... : physical APIC id: 03 .... register #01: 00178020 ....... : max redirection entries: 0017 ....... : PRQ implemented: 1 ....... : IO APIC version: 0020 .... register #02: 03000000 ....... : arbitration: 03 .... IRQ redirection table: NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect: 00 000 00 1 0 0 0 0 0 0 00 01 000 00 1 0 0 0 0 0 0 00 02 000 00 1 0 0 0 0 0 0 00 03 000 00 1 0 0 0 0 0 0 00 04 000 00 1 0 0 0 0 0 0 00 05 000 00 1 0 0 0 0 0 0 00 06 000 00 1 0 0 0 0 0 0 00 07 000 00 1 0 0 0 0 0 0 00 08 000 00 1 0 0 0 0 0 0 00 09 000 00 1 0 0 0 0 0 0 00 0a 000 00 1 0 0 0 0 0 0 00 0b 000 00 1 0 0 0 0 0 0 00 0c 000 00 1 0 0 0 0 0 0 00 0d 000 00 1 0 0 0 0 0 0 00 0e 000 00 1 0 0 0 0 0 0 00 0f 000 00 1 0 0 0 0 0 0 00 10 000 00 1 0 0 0 0 0 0 00 11 000 00 1 0 0 0 0 0 0 00 12 000 00 1 0 0 0 0 0 0 00 13 000 00 1 0 0 0 0 0 0 00 14 000 00 1 0 0 0 0 0 0 00 15 000 00 1 0 0 0 0 0 0 00 16 000 00 1 0 0 0 0 0 0 00 17 000 00 1 0 0 0 0 0 0 00
IO APIC #4...... .... register #00: 04000000 ....... : physical APIC id: 04 .... register #01: 00178020 ....... : max redirection entries: 0017 ....... : PRQ implemented: 1 ....... : IO APIC version: 0020 .... register #02: 04000000 ....... : arbitration: 04 .... IRQ redirection table: NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect: 00 0FF 0F 1 1 0 1 0 1 1 C1 01 000 00 1 0 0 0 0 0 0 00 02 000 00 1 0 0 0 0 0 0 00 03 000 00 1 0 0 0 0 0 0 00 04 000 00 1 0 0 0 0 0 0 00 05 000 00 1 0 0 0 0 0 0 00 06 000 00 1 0 0 0 0 0 0 00 07 000 00 1 0 0 0 0 0 0 00 08 000 00 1 0 0 0 0 0 0 00 09 000 00 1 0 0 0 0 0 0 00 0a 000 00 1 0 0 0 0 0 0 00 0b 000 00 1 0 0 0 0 0 0 00 0c 000 00 1 0 0 0 0 0 0 00 0d 000 00 1 0 0 0 0 0 0 00 0e 000 00 1 0 0 0 0 0 0 00 0f 000 00 1 0 0 0 0 0 0 00 10 000 00 1 0 0 0 0 0 0 00 11 000 00 1 0 0 0 0 0 0 00 12 000 00 1 0 0 0 0 0 0 00 13 000 00 1 0 0 0 0 0 0 00 14 000 00 1 0 0 0 0 0 0 00 15 000 00 1 0 0 0 0 0 0 00 16 000 00 1 0 0 0 0 0 0 00 17 000 00 1 0 0 0 0 0 0 00 IRQ to pin mappings: IRQ0 -> 0:2 IRQ1 -> 0:1 IRQ3 -> 0:3 IRQ4 -> 0:4 IRQ6 -> 0:6 IRQ7 -> 0:7 IRQ8 -> 0:8 IRQ9 -> 0:9 IRQ12 -> 0:12 IRQ13 -> 0:13 IRQ14 -> 0:14 IRQ15 -> 0:15 IRQ16 -> 0:16 IRQ18 -> 0:18 IRQ19 -> 0:19 IRQ20 -> 0:20 IRQ21 -> 0:21 IRQ23 -> 0:23 IRQ48 -> 2:0 .................................... done. Using local APIC timer interrupts. calibrating APIC timer ... ..... CPU clock speed is 2790.5914 MHz. ..... host bus clock speed is 132.8852 MHz. cpu: 0, clocks: 1328852, slice: 332213 CPU0<T0:1328848,T1:996624,D:11,S:332213,C:1328852> cpu: 1, clocks: 1328852, slice: 332213 cpu: 2, clocks: 1328852, slice: 332213 CPU1<T0:1328848,T1:664416,D:6,S:332213,C:1328852> CPU2<T0:1328848,T1:332208,D:1,S:332213,C:1328852> checking TSC synchronization across CPUs: passed. Waiting on wait_init_idle (map = 0x6) All processors have done init_idle mtrr: your CPUs had inconsistent variable MTRR settings mtrr: probably your BIOS does not setup all CPUs PCI: PCI BIOS revision 2.10 entry at 0xfd905, last bus=4 PCI: Using configuration type 1 PCI: Probing PCI hardware ......
Jury.
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